Real progress in electronics has been paced by improvements in the basic active electronic device, viz., the transistor, and in the ability to pack ever-increasing numbers of them onto a single silicon or gallium arsenide wafer or chip. Performance of these active devices (or integrated circuits) requires them to be electrically connected to other devices and eventually to an operating medium. These devices must also be protected from overheating, from physical abuse, and from the environment. The necessary connections and protection are provided by encasing the active devices in a package. That package interconnects and supports the chip while providing protection thereto.
The greatest volumes of integrated circuits produced today are contained in organic plastic packages. However, for high reliability, long life applications, hermetically sealed ceramic packages are employed. Most frequently, alumina (Al.sub.2 O.sub.3) and alumina multilayer packages have been utilized for such applications.
As the integrated circuit device grows in complexity, more and more active elements being packaged onto a chip, a higher proportion of the system signal response time is required to transmit signals between chips or to and from the operating application. The ideal unit would place the entire system on a single chip and eliminate or minimize off chip signals. That assembly has not been successfully produced.
Increased interconnect signal speed and integrity can be achieved by shortening the signal path between chips, by using a ceramic material having improved electrical properties, viz., a lower dielectric constant and a lower dissipation factor, and by lowering the resistance of the signal conductor and reducing noise. The closer spacing of chips requires very fine and closely-spaced signal lines and multi-layer packages with fine internal connections (vias). The combination of surface smoothness and flatness with close dimensional control becomes extremely critical for satisfactory fine line metallization and via registration. Whereas Al.sub.2 O.sub.3 substrates and multilayer packages can be ground to a smooth flat surface, the high thermal shrinkage of Al.sub.2 O.sub.3 (.about.18%), coupled with difficulty in machining, present problems in achieving high density via and pad registration. The relatively high dielectric constant of Al.sub.2 O.sub.3 at ambient temperature (.about.9-10) restricts the ability to closely space signal lines (cross talk, noise results), and also slows the speed of the signal itself.
Another major drawback in the use of Al.sub.2 O.sub.3 multilayer packages is the need for utilizing highly refractory metals such as molybdenum or tungsten for metallization because of the high firing temperature required for sintering Al.sub.2 O.sub.3 (.gtoreq.1500.degree. C). Whereas their electrical resistivities are relatively low, they are significantly higher than silver, copper, or gold, and, of course, molybdenum and tungsten require gold plating prior to soldering.
Accordingly, the objective of the present invention was to develop a new substrate material for a multilayer package exhibiting properties superior to those of Al.sub.2 O.sub.3 for that application; those properties including a lower dielectric constant (&lt;6), a sintering temperature no higher than 1000.degree. C., a smooth flat surface without additional processing, and improved dimensional control for location of vias and pads.